Asynchronous VLSI and Architecture
Yale

About | Chips | People | Teaching | Research | Papers | Sponsors | News



Design Methodology and Automation

As part of our larger design efforts, we also investigate concurrency theory and design methodologies for asynchronous systems. We have developed a significant tool suite for designing asynchronous chips, and the theory that supports this tool suite and a subset of some of the tools developed are detailed in the papers below.

Most of the theory we have developed is a direct result of problems encountered when using existing synthesis methods for asynchronous design. Therefore, our focus is on new theory and tools that enable large-scale design.

Students

Filipp Akopyan (Ph.D. 2011)
Edward Bingham
David Fang (Ph.D. 2008)
Wenmian Hua
Brittany Nkounkou (advised by Ross Tate, CS)
Stephen Longfield (Ph.D. 2015)
Sandra Jackson (Ph.D. 2014)
Song Peng (Ph.D. 2006)
John Teifel (Ph.D. 2004)

Publications

Wenmian Hua and Rajit Manohar. Exact Timing Analysis for Asynchronous Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi:10.1109/TCAD.2017.2693268, 2017.

Asa Dan, Rajit Manohar, and Yoram Moses. On Using Time Without Clocks via Zigzag Causality. ACM Symposium on Principles of Distributed Computing (PODC), July 2017.

Rajit Manohar and Yoram Moses. The Eventual C-Element Theorem for Delay-Insensitive Asynchronous Circuits. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2017. (abstract)   — Best paper finalist

Nitish Srivastava, Steve Dai, Rajit Manohar, and Zhiru Zhang. Accelerating Face Detection on Programmable SoC Using C-Based Synthesis. Proc. ACM Symposium on Field-Programmable Gate Arrays (FPGA), February 2017. (abstract, pdf)

Filipp Akopyan, Carlos Tadeo Ortega Otero, and Rajit Manohar. Hybrid Synchronous-Asynchronous Tool Flow for Emerging VLSI Design. IEEE International Workshop on Logic Synthesis (IWLS), June 2016. (abstract, pdf)

Wenmian Hua and Rajit Manohar. Exact Timing Analysis for Concurrent Systems. Work-in-progress session, Design Automation Conference, June 2016.

Sandra Jackson and Rajit Manohar. Gradual Synchronization. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2016. (abstract, pdf)   — Best paper finalist

Stephen Longfield, Brittany Nkounkou, Rajit Manohar, and Ross Tate. Preventing Glitches and Short Circuits in High-Level Self-Timed Chip Specifications. 36th Annual ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), June 2015. (abstract, pdf)

Rajit Manohar and Yoram Moses. Analyzing Isochronic Forks with Potential Causality. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2015. (abstract, pdf)   — Best paper finalist

Robert Karmazin, Stephen Longfield, Carlos Tadeo Ortega Otero, and Rajit Manohar. Timing Driven Placement for Quasi Delay-Insensitive Circuits. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2015. (abstract, pdf)

Carlos Tadeo Ortega Otero, Jonathan Tse, Robert Karmazin, Benjamin Hill, and Rajit Manohar. Automatic Obfuscated Cell Layout for Trusted Split-Foundry Design. IEEE International Symposium on Hardware-Oriented Security and Trust, May 2015.

Stephen Longfield and Rajit Manohar. Removing Concurrency for Rapid Functional Verification. Proceedings of the 2014 International Conference on Computer-Aided Design (ICCAD), November 2014. (abstract, pdf)

Benjamin Hill, Robert Karmazin, Carlos Tadeo Ortega Otero, Jonathan Tse, and Rajit Manohar. A Split-Foundry Asynchronous FPGA. Proceedings of the IEEE Custom Integrated Circuits Conference (CICC), September 2013. (abstract, pdf)

Robert Karmazin, Carlos Otero, and Rajit Manohar. CellTK: Automated Layout for Asynchronous Circuits with Nonstandard Cells. Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2013. (abstract, pdf)

Stephen Longfield and Rajit Manohar. Inverting Martin Synthesis for Verification. Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2013. (abstract, pdf)   — Best paper award

Song Peng, David Fang, John Teifel, and Rajit Manohar. Automated Synthesis for Asynchronous FPGAs. 13th ACM International Symposium on Field Programmable Gate Arrays (FPGA), February 2005. (abstract, pdf, ps)

John Teifel and Rajit Manohar. Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis. Proceedings of the 10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), April 2004. (abstract, pdf, ps)

Rajit Manohar. Scalable Formal Design Methods for Asynchronous VLSI. Proceedings of the 29th ACM SIGPLAN/SIGACT Conference on the Principles of Programming Languages [invited] (POPL), Portland, OR, January 2002.

Rajit Manohar. An Analysis of Reshuffled Handshaking Expansions. Proceedings of the 7th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), pp. 96--105, Salt Lake City, Utah, March 2001. (abstract, ps)

Rajit Manohar. The Entropy of Traces in Parallel Computation. IEEE Transactions on Information Theory, 45(5):1606--1608, July 1999. (abstract, pdf, ps)

Rajit Manohar, Tak-Kwan Lee, and Alain J. Martin. Projection: A Synthesis Technique for Concurrent Systems. Proceedings of the 5th IEEE International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC), pp. 125--134, April 1999. (abstract, pdf, ps)

K. Rustan M. Leino and Rajit Manohar. Joining Specification Statements. Theoretical Computer Science, 216:375-394, March 1999. (abstract, ps)

Rajit Manohar and Alain J. Martin. Slack Elasticity in Concurent Computing . Proceedings of the Fourth International Conference on the Mathematics of Program Construction (MPC), Lecture Notes in Computer Science 1422, pp. 272-285, Springer-Verlag 1998. (abstract, pdf, ps)


 
  
Yale