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Basit Riaz Sheikh and Rajit Manohar
We present the details of our energy-efficient asynchronous
floating-point multiplier (FPM) design. We discuss design trade-offs
of various multiplier implementations. A higher radix array multiplier
design with operand-dependent carry-propagation adder is presented which
yields significant energy savings while preserving the average throughput.
We provide a number of operand-dependent optimizations across the entire FPM
datapath to reduce energy consumption. Our FPM implementation also includes
a hardware implementation of special cases in the IEEE-754 standard such as
denormal and underflow cases. To our knowledge, this is the first detailed
design of a high-performance asynchronous double-precision
floating-point multiplier.
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