Rajit Manohar

Bio: Rajit Manohar is the John C. Malone Professor of Electrical Engineering and Professor of Computer Science at Yale. He received his B.S. (1994), M.S. (1995), and Ph.D. (1998) from Caltech. He has been on the Yale faculty since 2017, where his group conducts research on the design, analysis, and implementation of self-timed systems. He is the recipient of an NSF CAREER award, nine best paper awards, nine teaching awards, and was named to MIT technology review's top 35 young innovators under 35 for contributions to low power microprocessor design. His work includes the design and implementation of a number of self-timed VLSI chips including the first high-performance asynchronous microprocessor, the first microprocessor for sensor networks, the first asynchronous dataflow FPGA, the first radiation hardened SRAM-based FPGA, and the first deterministic large-scale neuromorphic architecture. Prior to Yale, he was Professor of Electrical and Computer Engineering and a Stephen H. Weiss Presidential Fellow at Cornell. He has served as the Associate Dean for Research and Graduate studies at Cornell Engineering, the Associate Dean for Academic Affairs at Cornell Tech, and the Associate Dean for Research at Cornell Tech. He founded Achronix Semiconductor to commercialize high-performance asynchronous FPGAs.

Shorter Bio: Rajit Manohar is Professor of Electrical Engineering and Computer Science at Yale. He received his B.S. (1994), M.S. (1995), and Ph.D. (1998) from Caltech. His group conducts research on the design, analysis, and implementation of self-timed systems. He is the recipient of an NSF CAREER award, nine best paper awards, nine teaching awards, and was named to MIT technology review's top 35 young innovators under 35 for contributions to low power microprocessor design.

Longer Bio: Rajit Manohar is the John C. Malone Professor of Electrical Engineering and Professor of Computer Science at Yale. He received his B.S. (1994), M.S. (1995), and Ph.D. (1998) from Caltech. He joined the Yale faculty in January 2017, where his group conducts research on the design, analysis, and implementation of self-timed systems.

His work on high-performance systems includes the design and implementation of the first high-performance asynchronous microprocessor, and the design of a GHz-class asynchronous dataflow field-programmable gate array (FPGA) architecture. His work on fault-tolerant asynchronous systems includes the first radiation-hardened SRAM-based FPGA with self-correcting logic. His work on low power asynchronous systems includes the first event-driven microprocessor optimized for sensor networks, a low power data-driven GPS baseband processor, and low power floating-point arithmetic circuits. His work on the foundations of asynchronous circuits includes theory and methods for verification, synthesis, timing validation, and physical design. Most recently, his group worked closely with IBM research to create the TrueNorth neuromorphic architecture, the first single-chip million neuron system and the first deterministic large-scale neuromorphic architecture. The project received the inaugural Misha Mahowald Prize for neuromorphic engineering, and the TrueNorth chip is now part of the Computer History Museum's collection.

He is the recipient of an NSF CAREER award, nine best paper awards, nine teaching awards, and was named to MIT technology review's top 35 young innovators under 35 for contributions to low power microprocessor design. Prior to Yale, he was Professor of Electrical and Computer Engineering and a Stephen H. Weiss Presidential Fellow at Cornell. He has served as the Associate Dean for Research and Graduate studies at Cornell Engineering, the Associate Dean for Academic Affairs at Cornell Tech, and the Associate Dean for Research at Cornell Tech. He holds over forty patents, and co-founded Achronix Semiconductor to commercialize high-performance asynchronous FPGAs.

 
  
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