Brain-computer interfaces (BCIs) offer avenues to treat neurological disorders, shed light on brain function, and interface the brain with the digital world. The need for adequate real-time performance, stringent power constraints, and important FDA-mandated safety requirements to enable chronic implantation, however, preclude their wide adoption. Consequently, brain-computer interfaces have, to date, been designed as custom ASICs that treat only certain diseases or perform specific tasks in specific brain regions. General-purpose architectures that can be used for multiple tasks and to treat multiple diseases are needed for wider BCI adoption, but the conventional wisdom is that such systems cannot meet BCI performance/power constraints.
We present HALO (a Hardware Architecture for LOw-power BCIs), a general-purpose architecture for implantable BCIs. HALO enables treatment of disorders (e.g., epilepsy, movement disorders), and records/processes data for studies that advance our understanding of the brain. We use electrophysiological data from the motor cortex of a non-human primate to determine how to decompose these tasks into hardware building blocks. We simplify, prune, and share these building blocks to judiciously use available hardware resources. The result is a configurable heterogeneous array of hardware processing elements (PEs). The PEs are configured by a RISC-V micro-controller into signal processing pipelines that meet the target performance and power constraints necessary to deploy HALO widely and safely.