Shared staticizer for area-efficient asynchronous circuits

Samira Ataei, Rajit Manohar

Quasi-Delay-Insensitive asynchronous designs can simultaneously provide higher performance, lower energy consumption and less sensitivity to the process variations compared to their clocked counterparts. However, these circuits normally exhibit more silicon area overhead. In this paper, a shared-staticizer solution is presented, to eliminate some part of this area overhead. Staticizers, also known as keepers, are one of the most widely used primitives is asynchronous datapath and control design. Hence, reducing staticizer gate area can result in great area reduction for entire design. Effectiveness of the proposed shared-staticizer method is evaluated in several technology nodes and different asynchronous designs. Results show this technique works correctly down to subthreshold voltage and is superior to other staticizer implementations with respect to area consumption with no impact on performance and power. Shared-staticizer handles output congestion and arbitrary input rates, safely.