EENG 425/ENAS 875 Fall 2017: Final Projects

EENG 425/ENAS 875 catalog entry. Chip design; integrated devices, circuits, and digital subsystems needed for design and implementation of silicon logic chips. CMOS fabrication overview, complementary logic circuits, design methodology, computer-aided design techniques, timing, and area estimation. Exploration of recent and future chip technologies. A course project is the design, through layout, of a digital CMOS subsystem chip; selected projects are fabricated for students.

EENG 425/ENAS 875 is Yale's introductory digital VLSI course. Students learn about digital VLSI, and get to tape-out a full-custom chip of their choosing at the end of the semester using the MOSIS VLSI service.

Tools. We switched to using open-source tools in a virtual machine environment (Ubuntu Linux) for chip design. The main tools used by the students were the following:

• magic, for full-custom layout. We also provided scripts to automate the layout of groups of transistors.
• irsim, for digital switch-level simulation. This was locally hacked to provide some extra functionality.
• peg, for state machine generation.
• mpla, for PLA generation, with our custom tiles for PLA generation in 0.6μm.
• ngspice (by some), for analog simulation.

Projects

	Accumulator Memory
	Floating-point multiplier
	Mastermind
	Karplus-Strong algorithm
	XOR-based scrambler/descrambler