Variability in 3-D Intergrated Circuits

Filipp Akopyan, Carlos Tadeo Ortega Otero, David Fang, Sandra J. Jackson, Rajit Manohar

In recent years, there has been a trend among digital and analog circuit designers towards three-dimensional integration. There has been some debate regarding the applicability of 3-D technology to general logic circuits, especially with regard to thermal issues. We examine process variations on the same layer, across layers, and cross-chip variations. We show how the performance of each layer of the 3-D chip varies with temperature, and demonstrate the effect of heat pipes on circuit performance.