Asynchronous VLSI and Architecture

About | Chips | People | Teaching | Research | Papers | Sponsors | News

We conduct research on semantics, design methodologies, and architectures for asynchronous systems. We have designed and fabricated microprocessors, FPGAs, 2D and 3D integrated circuits, neuromorphic chips, as well as developed the necessary software tools to support the hardware. We also write the necessary EDA tools to support our hardware development efforts. Overall, the goal of our research is the design and implementation of efficient and programmable computation structures.

Efficient programmable substrates:

  • Asynchronous FPGAs. This project investigates pipeline-level programmable asynchronous logic.

  • Ultra Low Power Embedded Systems. Research on ultra low power asynchronous VLSI platforms. Past work has included the design of ultra low power asynchronous architectures for sensor network nodes.

  • Neuromorphic Computing. Research on computation structures that are neuroscience-inspired, and that can be efficiently implemented with asynchronous circuits.

  • Asynchronous Computer Architecture. The goal of this work is to develop new micro-architectures that exploit the difference between the average case and worst case cycle time of asynchronous circuits.
Cross-cutting projects:
  • Energy-efficient VLSI and Arithmetic. The goal of this project is to develop design methods and components for low energy and high performance design using circuit and algorithmic techniques.

  • Design Methodology and Automation. Theory of concurrent systems as it relates to the design and implementation of asynchronous VLSI circuits. Emphasis is on techniques that can handle the design-complexity of large-scale systems, and tool development that supports design efforts.
Older projects: Collaborators: